1 | /* |
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2 | * Copyright (C) 2009, 2010, 2011 Lockless Inc., Steven Von Fuerst. |
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3 | * |
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4 | * This library is free software: you can redistribute it and/or modify |
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5 | * it under the terms of the GNU General Public License as published by |
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6 | * the Free Software Foundation, either version 3 of the License, or |
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7 | * (at your option) any later version. |
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8 | * |
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9 | * This library is distributed in the hope that it will be useful, |
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10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 | * GNU General Public License for more details. |
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13 | * |
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14 | * You should have received a copy of the GNU General Public License |
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15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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16 | */ |
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17 | |
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18 | /* |
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19 | * Functions that require asm for efficiency, or to work at all... |
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20 | */ |
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21 | #if 1 |
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22 | #ifndef LL_ASM_H |
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23 | #define LL_ASM_H |
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24 | |
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25 | #include "compiler.h" |
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26 | #include <stdint.h> |
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27 | #ifdef GCC_ASM |
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28 | #include <stdint.h> |
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29 | #define atomic_or(P, V) __sync_or_and_fetch((P), (V)) |
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30 | #define atomic_and(P, V) __sync_and_and_fetch((P), (V)) |
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31 | #define atomic_add(P, V) __sync_add_and_fetch((P), (V)) |
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32 | #define atomic_xadd(P, V) __sync_fetch_and_add((P), (V)) |
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33 | #define atomic_cmpxchg_bool(P, O, N) __sync_bool_compare_and_swap((P), (O), (N)) |
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34 | #define atomic_access(V) (*(volatile typeof(V) *)&(V)) |
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35 | |
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36 | |
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37 | #if 0 |
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38 | static inline int bts(volatile void *mem, size_t offset) |
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39 | { |
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40 | asm goto ( |
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41 | "lock; bts %0, (%1)\n" |
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42 | "jc %l[carry]\n" |
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43 | : |
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44 | : "r" (offset), "r" (mem) |
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45 | : "memory", "cc" |
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46 | : carry); |
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47 | return 0; |
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48 | |
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49 | carry: |
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50 | return 1; |
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51 | } |
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52 | |
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53 | static inline int btr(volatile void *mem, size_t offset) |
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54 | { |
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55 | asm goto ( |
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56 | "lock; btr %0, (%1)\n" |
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57 | "jnc %l[ncarry]\n" |
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58 | : |
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59 | : "r" (offset), "r" (mem) |
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60 | : "memory", "cc" |
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61 | : ncarry); |
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62 | return 1; |
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63 | |
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64 | ncarry: |
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65 | return 0; |
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66 | } |
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67 | #endif |
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68 | static inline int ffsu(unsigned x) |
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69 | { |
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70 | int result; |
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71 | |
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72 | asm ("bsf %[x], %[result]" |
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73 | : [result] "=r" (result) |
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74 | : [x] "mr" (x) |
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75 | :"cc"); |
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76 | |
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77 | return result; |
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78 | } |
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79 | |
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80 | static inline size_t flsu(unsigned x) |
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81 | { |
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82 | size_t result; |
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83 | |
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84 | asm ("bsr %[x], %[result]" |
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85 | : [result] "=r" (result) |
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86 | : [x] "mr" (x) |
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87 | :"cc"); |
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88 | |
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89 | return result; |
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90 | } |
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91 | |
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92 | #ifdef __x86_64__ |
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93 | static inline size_t ffsq(size_t x) |
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94 | { |
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95 | size_t result; |
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96 | |
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97 | asm ("bsfq %[x], %[result]" |
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98 | : [result] "=r" (result) |
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99 | : [x] "mr" (x) |
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100 | :"cc"); |
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101 | |
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102 | return result; |
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103 | } |
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104 | |
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105 | static inline size_t flsq(size_t x) |
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106 | { |
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107 | size_t result; |
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108 | |
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109 | asm ("bsrq %[x], %[result]" |
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110 | : [result] "=r" (result) |
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111 | : [x] "mr" (x) |
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112 | :"cc"); |
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113 | |
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114 | return result; |
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115 | } |
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116 | |
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117 | #else |
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118 | static inline size_t ffsq(unsigned long long x) |
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119 | { |
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120 | size_t result; |
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121 | |
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122 | unsigned xlo = x & 0xffffffff; |
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123 | unsigned xhi = x >> 32; |
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124 | |
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125 | unsigned tmp; |
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126 | |
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127 | asm ("bsfl %[xhi], %[tmp]\n" |
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128 | "addl $0x20, %[tmp]\n" |
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129 | "bsfl %[xlo], %[result]\n" |
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130 | "cmove %[tmp], %[result]\n" |
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131 | :[result] "=r" (result), [tmp] "=&r" (tmp) |
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132 | :[xlo] "rm" (xlo), [xhi] "rm" (xhi) |
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133 | :"cc"); |
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134 | |
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135 | return result; |
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136 | } |
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137 | |
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138 | static inline size_t flsq(unsigned long long x) |
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139 | { |
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140 | size_t result; |
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141 | |
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142 | unsigned xlo = x & 0xffffffff; |
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143 | unsigned xhi = x >> 32; |
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144 | unsigned tmp; |
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145 | |
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146 | asm ("bsrl %[xlo], %[tmp]\n" |
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147 | "addl $-0x20, %[tmp]\n" |
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148 | "bsrl %[xhi], %[result]\n" |
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149 | "cmove %[tmp], %[result]\n" |
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150 | "addl $0x20, %[result]\n" |
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151 | :[result] "=r" (result), [tmp] "=&r" (tmp) |
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152 | :[xlo] "rm" (xlo), [xhi] "rm" (xhi) |
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153 | :"cc"); |
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154 | |
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155 | return result; |
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156 | } |
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157 | |
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158 | #endif |
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159 | |
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160 | static inline unsigned char xchg_8(void *ptr, unsigned char x) |
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161 | { |
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162 | asm volatile("xchgb %0,%1" |
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163 | :"=r" ((unsigned char) x) |
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164 | :"m" (*(volatile unsigned char *)ptr), "0" (x) |
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165 | :"memory"); |
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166 | |
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167 | return x; |
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168 | } |
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169 | |
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170 | static inline unsigned short xchg_16(void *ptr, unsigned short x) |
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171 | { |
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172 | asm volatile("xchgw %0,%1" |
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173 | :"=r" ((unsigned short) x) |
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174 | :"m" (*(volatile unsigned short *)ptr), "0" (x) |
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175 | :"memory"); |
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176 | |
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177 | return x; |
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178 | } |
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179 | |
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180 | |
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181 | static inline unsigned xchg_32(void *ptr, unsigned x) |
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182 | { |
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183 | asm volatile("xchgl %0,%1" |
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184 | :"=r" ((unsigned) x) |
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185 | :"m" (*(volatile unsigned *)ptr), "0" (x) |
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186 | :"memory"); |
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187 | |
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188 | return x; |
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189 | } |
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190 | |
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191 | #ifdef __x86_64__ |
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192 | static inline unsigned long long xchg_64(void *ptr, unsigned long long x) |
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193 | { |
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194 | asm volatile("xchgq %0,%1" |
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195 | :"=r" ((unsigned long long) x) |
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196 | :"m" (*(volatile unsigned long long *)ptr), "0" (x) |
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197 | :"memory"); |
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198 | |
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199 | return x; |
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200 | } |
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201 | |
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202 | static inline void *xchg_ptr(void *ptr, void *x) |
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203 | { |
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204 | __asm__ __volatile__("xchgq %0,%1" |
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205 | :"=r" ((uintptr_t) x) |
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206 | :"m" (*(volatile uintptr_t *)ptr), "0" ((uintptr_t) x) |
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207 | :"memory"); |
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208 | |
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209 | return x; |
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210 | } |
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211 | #else |
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212 | static inline void *xchg_ptr(void *ptr, void *x) |
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213 | { |
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214 | __asm__ __volatile__("xchgl %k0,%1" |
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215 | :"=r" ((uintptr_t) x) |
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216 | :"m" (*(volatile uintptr_t *)ptr), "0" ((uintptr_t) x) |
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217 | :"memory"); |
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218 | return x; |
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219 | } |
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220 | #endif |
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221 | |
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222 | static inline unsigned long long rdtsc(void) |
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223 | { |
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224 | unsigned hi, lo; |
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225 | asm volatile ("rdtsc" : "=a"(lo), "=d"(hi)); |
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226 | return lo + ((unsigned long long)hi << 32); |
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227 | } |
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228 | |
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229 | #else /* GCC_ASM */ |
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230 | |
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231 | static inline int ffsu(unsigned x) |
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232 | { |
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233 | unsigned long result; |
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234 | __assume(x); |
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235 | _BitScanForward(&result, x); |
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236 | |
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237 | return result; |
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238 | } |
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239 | |
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240 | static inline int flsu(unsigned x) |
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241 | { |
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242 | unsigned long result; |
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243 | __assume(x); |
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244 | _BitScanReverse(&result, x); |
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245 | |
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246 | return result; |
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247 | } |
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248 | |
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249 | static inline size_t ffsq(unsigned long long x) |
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250 | { |
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251 | unsigned long result; |
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252 | __assume(x); |
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253 | _BitScanForward64(&result, x); |
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254 | |
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255 | return result; |
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256 | } |
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257 | |
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258 | static inline size_t fflq(unsigned long long x) |
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259 | { |
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260 | unsigned long result; |
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261 | __assume(x); |
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262 | _BitScanReverse64(&result, x); |
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263 | |
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264 | return result; |
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265 | } |
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266 | |
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267 | #ifdef __x86_64__ |
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268 | static inline void *xchg_ptr(void *ptr, void *x) |
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269 | { |
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270 | return (void *) _InterlockedExchange64(ptr, (int64_t) x); |
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271 | } |
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272 | #else |
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273 | static inline void *xchg_ptr(void *ptr, void *x) |
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274 | { |
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275 | return (void *) _InterlockedExchange(ptr, (long) x); |
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276 | } |
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277 | #endif |
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278 | |
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279 | |
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280 | #endif /* GCC_ASM */ |
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281 | |
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282 | #endif /* LL_ASM_H */ |
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283 | |
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284 | #endif |
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285 | #if 0 |
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286 | static inline int ffsu(unsigned x) |
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287 | { |
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288 | unsigned long result = __builtin_ffs(x); |
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289 | |
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290 | |
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291 | return result - 1; |
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292 | } |
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293 | |
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294 | static inline int flsu(unsigned x) |
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295 | { |
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296 | unsigned long result; |
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297 | __assume(x); |
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298 | _BitScanReverse(&result, x); |
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299 | |
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300 | return result; |
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301 | } |
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302 | |
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303 | static inline size_t ffsq(unsigned long long x) |
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304 | { |
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305 | unsigned long result; |
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306 | __assume(x); |
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307 | _BitScanForward64(&result, x); |
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308 | |
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309 | return result; |
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310 | } |
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311 | |
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312 | static inline size_t fflq(unsigned long long x) |
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313 | { |
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314 | unsigned long result; |
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315 | __assume(x); |
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316 | _BitScanReverse64(&result, x); |
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317 | |
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318 | return result; |
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319 | } |
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320 | #endif |
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